Switching type voltage regulators and other devices use pulse width modulators (PWMs) to generate pulse train (bit stream) signals with a controllably variable duty cycle. Duty cycle is the ratio of the duration during which the stream is a binary assertion (e.g., high level) compared to the duration during which the stream is a binary de-assertion (e.g., low level) over a period of the signal. For example, in a system where a high ('1) is an assertion, a 60% duty cycle implies that the high state last 60% of the period, while the low state last only 40%.
With switching voltage regulators, a PWM is typically used to turn switches on and off in order to increase or decrease the amount of energy supplied to a regulated voltage in order to control the voltage. The switches are typically on when the bit stream is asserted and off when it is not asserted. Thus, more or less energy can be supplied to the load by increasing or decreasing, respectively, the bit stream duty cycle.
With reference to FIG. 1, a portion of a conventional PWM is shown. It comprises a triangular waveform synthesizer (or generator) 101 coupled to the negative input of a comparator 103. A variable voltage reference, controls the pulse duty cycle generated by the PWM and is coupled to the other (positive) input. The triangular waveform generator generates a waveform between two fixed voltages, for example, ground and VCC. The comparator compares the signal from the triangle wave generator against the level of the variable reference. The comparator generates at its output a bit stream having a pulse width that depends on the value of the variable voltage reference. With a higher reference, more of each triangle wave causes the output to be low resulting in a bit stream with a lower duty cycle (assuming that the bit stream asserts when high). In contrast, when the variable reference is lower, more of each triangle wave causes the output to be high, resulting in a higher duty cycle. For example, when the reference is at the low rail of the triangle wave, the duty cycle is 100%, and when it is at its high rail, the duty cycle is 0%. Thus, the duty cycle can be controlled to be anywhere between 100 and 0 percent by correspondingly varying the reference between Gnd and VCC.
Unfortunately, the comparator circuit and circuit used to create the variable reference can be relatively complex, especially if it is to perform with reasonable precision. With multi-phase switching regulators, which typically use a separate PWM for each phase, this becomes even more problematic. In addition, distributing the variable reference signal into the multiple comparators can result in inconsistent reference levels and in noise. Accordingly, an improved solution is desired.